This invention relates to high-density cross-point resistor memory arrays ULSI memory chip and embedded memory application
Perovskite metal oxide thin films, such as Pr0.7Ca0.3MnO3 (PCMO) thin films, have reversible resistance change properties, which can be used in non-volatile memory devices for information storage. Known methods to induce the resistance change include application of a short electric pulse for writing and a long electric pulse for resetting, wherein both electric pulses have the same polarity.
PCMO thin films exhibit reversible resistance change when an electric pulse is applied. A PCMO thin film has been grown on both epitaxial YBa2Cu3O7 (YBCO) and partial applied. A PCMO thin film has been grown on both epitaxial YBa2Cu3O7 (YBCO) and partial epitaxial platinum substrates via pulsed laser ablation (PLA) technique, Liu et al., Electric-pulse-induced reversible resistance change effect in magnetoresistive films, Applied Physics Letters, 76, 2749, 2000; and Liu et al., U.S. Pat. No. 6,204,139, granted Mar. 20, 2001, for Method of switching the properties of perovskite materials used in thin film resistors. X-Ray diffraction (XRD) polar figures confirm the epitaxial properties of PCMO thin films.
U.S. Pat. No. 6,204,139 describes the resistance change which occurred when electric pulses were applied at room temperature to PCMO thin films. The PCMO thin films were deposited on both epitaxial YBa2Cu3O7 (YBCO) and partial epitaxial platinum substrates by pulsed laser deposition (PLD). The polarity of the electric pulse determines the character of the resistance change, i.e., increase or decrease.
An electrically programmable resistance, non-volatile memory device, operable at room temperature, was made of PCMO epitaaially grown on YBCO on LaAlO3, as published by Liu et al, however, the sample size was on the order of hundred of microns square, which is not practical for commercial production. This type of memory may be reversibly programmed by a reversed short electrical pulse. The memory cell is able to produce either single bit or multi-bit information. However, the PCMO must be in crystalline form, which requires that the PCMO must be grown on a specific bottom electrode, such as YBCO, which is not compatible to the state-of-the-art silicon integrated circuit technology. The growth, or crystallization, temperature is relatively high, e.g.,  greater than 700xc2x0 C., which makes integration of the device into state-of-the-art integrated circuit very complex. In addition it is not possible to cover the full circuit area with a single grain of PCMO. As the properties of a memory cell which is fabricated on a single grain PCMO crystal and the properties of a memory cell which is fabricated on a multi-grain PCMO crystal, which covers the grain boundary area, are not the same, circuit yield and memory performance problems will occur. A low xcex94R/R ratio was reported for the Liu et at. sample. It is not believed that the Liu et al. technique can be applied to commercially manufactured non-volatile memory devices.
High-density memory devices, such as DRAM and flash memory, have small cell sizes, hence higher density integration is possible. Conventional DRAM, however, requires a complex fabrication process, and conventional flash memory requires high voltage programming and is difficult to scale down to sub-micron cell size.
A method of fabricating a self-aligned cross-point memory array includes preparing a substrate, including forming any supporting electronic structures; forming a swell area on the substrate; implanting ions to form a deep N+ region; implanting ions to form a shallow P+ region on the N+ region to form a P+/N junction; depositing a barrier metal layer on the P+ region; depositing a bottom electrode layer on the barrier metal layer; depositing a sacrificial layer of polysilicon or silicon nitride on the bottom electrode layer; patterning and etching the structure to remove portions of the polysilicon layer, the bottom electrode layer, the barrier metal layer, the P+ region and the N+ region to form a trench; depositing oxide to fill the trench; patterning and etching the polysilicon; depositing a PCMO layer which is self-aligned with the remaining bottom electrode layer; depositing a top electrode layer; patterning and etching the top electrode layer; and completing the memory array structure.
It is an object of the invention to provide a high density cross point resistor memory array having isolated PCMO cell pillars self-aligned to the bottom electrode.
Another object of the invention is to provide an array which has a small cell size, low leakage current, and low cross talk between memory cells.
This summary and objectives of the invention are provided to enable quick comprehension of the nature of the invention. A more thorough understanding of the invention may be obtained by reference to the following detailed description of the preferred embodiment of the invention in connection with the drawings.